july 1996 nds3 35n n-channel logic level enhancement mode field effect transistor general description features ________________________________________________________________________________ absolute maximum ratings t a = 25c unless otherwise noted symbol parameter nds335n units v dss drain-source voltage 20 v v gss gate-source voltage - continuous 8 v i d maximum drain current - continuous (note 1a) 1.7 a - pulsed 10 p d maximum power dissipation (note 1a ) 0.5 w (note 1 b) 0.46 t j ,t stg operating and storage temperature range -55 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 250 c/w r q jc thermal resistance, junction-to-case (note 1) 75 c/w nds335 rev.c 1.7 a, 20 v. r ds(on ) = 0.14 w @ v gs = 2.7 v r ds(on ) = 0.11 w @ v gs = 4.5 v. industry standard outline sot-23 surface mount package using poprietary supersot tm -3 design for superior thermal and electrical capabilities. high density cell design for extremely low r ds(on) . exceptional on-resistance and maximum dc current capability. these n -c hannel logic level enhancement mode power field effect transistors are produced using fairchild's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance. these devices are particularly suited for low voltage applications in notebook computers, portable phones, pcmcia cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. d s g ? 1997 fairchild semiconductor corporation
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 20 v i dss zero gate voltage drain current v ds = 16 v, v gs = 0 v 1 a t j =125c 10 a i gssf gate - body leakage, forward v gs = 8 v, v ds = 0 v 100 na i gssr gate - body leakage, reverse v gs = -8 v, v ds = 0 v -100 na on characteristics (note 2 ) v gs (th) gate threshold voltage v ds = v gs , i d = 250 a 0.5 0.7 1 v t j =125c 0.3 0.5 0.8 r ds(on) static drain-source on-resistance v gs = 2.7 v, i d = 1.7 a 0.084 0.14 w t j =125c 0.13 0.25 v gs = 4.5 v, i d = 1.7 a 0.065 0.11 i d(on) on-state drain current v gs = 2.7 v, v ds = 5 v 5 a v gs = 4.5 v, v ds = 5 v 10 g fs forward transconductance v ds = 5 v, i d = 1.7 a, 6 s dynamic characteristics c iss input capacitance v ds = 10 v, v gs = 0 v, f = 1.0 mhz 240 pf c oss output capacitance 130 pf c rss reverse transfer capacitance 40 pf switching ch aracteristics (note 2 ) t d(on ) turn - on delay time v dd = 5 v, i d = 1 a, v gs = 4.5 v, r gen = 6 w 8 20 ns t r turn - on rise time 29 45 ns t d(off) turn - off delay time 28 40 ns t f turn - off fall time 8 20 ns q g total gate charge v ds = 10 v, i d = 1.7 a, v gs = 4.5 v 6.4 9 nc q gs gate-source charge 0.5 nc q gd gate-drain charge 2 nc nds335 rev.c
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions min typ max units drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current 0.42 a i sm maximum pulsed drain-source diode forward current 10 a v sd drain-source diode forward voltage v gs = 0 v, i s = 0.42 a (note 2 ) 0.8 1.2 v notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the s older mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. p d ( t ) = t j - t a r q j a ( t ) = t j - t a r q j c + r q c a ( t ) = i d 2 ( t ) r d s ( o n ) t j typical r q ja using the board layouts shown below on 4.5"x5" fr-4 pcb in a still air environment : a. 250 o c/w when mounted on a 0.02 in 2 pad of 2oz copper. b. 270 o c/w when mounted on a 0.001 in 2 pad of 2oz copper. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. nds335 rev.c 1a 1b
nds335 rev.c figure 1. on-region characteristics . 0 0.4 0.8 1.2 1.6 2 0 1 2 3 4 5 v , drain-source voltage (v) i , drain-source current (a) 2.5 1.5 v =4.5v gs ds d 3.0 2.0 2.7 figure 2. on-resistance variation with drain current and gate voltage. 0 1 2 3 4 5 0.5 0.75 1 1.25 1.5 1.75 i , drain current (a) drain-source on-resistance t = 125c j 25c d v = 2.7 v gs -55c r , normalized ds(on) figure 4. on-resistance variation with drain current and temperature . -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 1.8 t , junction temperature (c) drain-source on-resistance j v = 2.7v gs i = 1.7a d r , normalized ds(on) figure 3. on-resistance variation with temperature. 0 0.5 1 1.5 2 2.5 3 0 1 2 3 4 5 v , gate to source voltage (v) i , drain current (a) 25c 125c v = 5.0v ds gs d t = -55c j figure 5. transfer characteristics . -50 -25 0 25 50 75 100 125 150 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 t , junction temperature (c) gate-source threshold voltage j i = 250a d v = v ds gs v , normalized th figure 6. gate threshold variation with temperature. 0 1 2 3 4 5 0.5 0.75 1 1.25 1.5 1.75 i , drain current (a) drain-source on-resistance v = 2.0v gs d r , normalized ds(on) 3.5 4.5 2.7 3.0 2.5 typical electrical characteristics
nds335 rev.c typical electrical characteristics (continued) -50 -25 0 25 50 75 100 125 150 0.92 0.96 1 1.04 1.08 1.12 t , junction temperature (c) drain-source breakdown voltage bv , normalized dss j i = 250a d figure 7. breakdown voltage variation with temperature . 0.1 0.2 0.5 1 2 5 10 20 10 20 50 100 200 400 600 v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss figure 9. capacitance characteristics . 0 0.2 0.4 0.6 0.8 1 1.2 0.0001 0.001 0.01 0.1 1 v , body diode forward voltage (v) i , reverse drain current (a) t = 125c j 25c -55c v = 0v gs sd s figure 8. body diode forward voltage variation with source current and temperature . 0 2 4 6 8 0 1 2 3 4 5 q , gate charge (nc) v , gate-source voltage (v) g gs i = 1.7a d 10v 15v v = 5v ds figure 10. gate charge characteristics . g d s v dd r l v v in out v gs dut r gen figure 11. switching test circuit. figure 12. switching waveforms . 10% 50% 90% 10% 90% 90% 50% v in v out on off d(off) f r d(on) t t t t t t inverted 10% pulse width
nds335 rev.c typical electrical characteristics (continued) 0 1 2 3 4 5 0 2 4 6 8 10 12 i , drain current (a) g , transconductance (siemens) t = -55c j 25c d fs v = 5.0v ds 125c figure 13. transconductance variation with drain current and temperature . 0 0.1 0.2 0.3 0.4 0 0.2 0.4 0.6 0.8 1 2oz copper mounting pad area (in ) steady-state power dissipation (w) 2 1b 1a 4.5"x5" fr-4 board t = 25 c still air a o figue 15. supersot tm _ 3 maximum steady- state power dissipation versus copper mounting pad area. 0.1 0.2 0.5 1 2 5 10 20 30 0.01 0.03 0.1 0.3 1 3 10 20 v , drain-source voltage (v) i , drain current (a) ds d dc 1s 10ms 100ms 10s rds(on) limit v = 2.7v single pulse r =see note1b t = 25c gs a q ja 100us figure 14. maximum safe operating area 0 0.1 0.2 0.3 0.4 0.8 1.2 1.6 2 2.4 2oz copper mounting pad area (in ) i , steady-state drain current (a) 2 1b 1a d 4.5"x5" fr-4 board t = 25 c still air v = 2.7v a o gs figure 16 . maximum steady-state drain current versus copper mounting pad area . figure 17. transient thermal response curve. note : characterization performed using the conditions described in note 1b. transient thermal response will change depending on the circuit board design . 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance duty cycle, d = t /t 1 2 r (t) = r(t) * r r = see note 1b q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?
|
